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74HC573 - Octal D-type transparent latch

74HC573 - Octal D-type transparent latch
Product Code: TD-7H573
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74HC573 - Octal D-type transparent latch

Description

The 74HC/HCT573 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT573 are octal D-type transparent latches featuring separate D-type inputs for each latch and 3-state outputs for bus oriented applications.
A latch enable (LE) input and an output enable (OE) input are common to all latches.
The “573” consists of eight D-type transparent latches with 3-state true outputs. When LE is HIGH, data at the Dn inputs enter the latches. In this condition the latches are transparent, i.e. a latch output will change state each time its corresponding D-input changes.
When LE is LOW the latches store the information that was present at the D-inputs a set-up time preceding the HIGH-to-LOW transition of LE.
When OE is LOW, the contents of the 8 latches are available at the outputs. 
When OE is HIGH, the outputs go to the high impedance OFF-state.
Operation of the OE input does not affect the state of the latches.

 

Category Integrated Circuits (ICs)
Name 74HC573 Octal D-type transparent latch; 3-state
Family CMOS
Series 74xxx
Mounting Type Through Hole
No. of Pins 14 (DIP)

 

Features:

  • Inputs and outputs on opposite sides of package allowing easy interface with microprocessors.
  • Useful as input or output port for microprocessors/microcomputers.
  • 3-state non-inverting outputs for bus oriented applications.
  • Common 3-state output enable input
  • Output capability: bus driver
  • ICC category: MSI

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Description

 

74HC573 - Octal D-type transparent latch

Description

The 74HC/HCT573 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT573 are octal D-type transparent latches featuring separate D-type inputs for each latch and 3-state outputs for bus oriented applications.
A latch enable (LE) input and an output enable (OE) input are common to all latches.
The “573” consists of eight D-type transparent latches with 3-state true outputs. When LE is HIGH, data at the Dn inputs enter the latches. In this condition the latches are transparent, i.e. a latch output will change state each time its corresponding D-input changes.
When LE is LOW the latches store the information that was present at the D-inputs a set-up time preceding the HIGH-to-LOW transition of LE.
When OE is LOW, the contents of the 8 latches are available at the outputs. 
When OE is HIGH, the outputs go to the high impedance OFF-state.
Operation of the OE input does not affect the state of the latches.

 

Category Integrated Circuits (ICs)
Name 74HC573 Octal D-type transparent latch; 3-state
Family CMOS
Series 74xxx
Mounting Type Through Hole
No. of Pins 14 (DIP)

 

Features:

  • Inputs and outputs on opposite sides of package allowing easy interface with microprocessors.
  • Useful as input or output port for microprocessors/microcomputers.
  • 3-state non-inverting outputs for bus oriented applications.
  • Common 3-state output enable input
  • Output capability: bus driver
  • ICC category: MSI

*Image shown is a representation only.

Write a review

Your Name:


Your Review: Note: HTML is not translated!

Rating: Bad           Good

Enter the code in the box below:



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