74LS73 - Dual JK flip-flop with reset

74LS73 - Dual JK flip-flop with reset; negative-edge trigger

Equivalent substitute - 74HC73

Description:

The SN54LS/74LS73A offers individual J, K, clear, and clock inputs. These dual flip-flops are designed so that when the clock goes HIGH, the inputs are enabled and data will be accepted. The logic level of the J and K inputs may be allowed to change when the clock pulse is HIGH and the bistable will perform according to the truth table as long as minimum set-up times are observed. Input data is transferred to the outputs on the negative-going edge of the clock pulse.

*Image shown is a representation only.