24C04 256x8(2k) Serial CMOS EEPROM
Features
Low Voltage and Standard-Voltage Operation
2-wire Serial Interface
Schmitt Trigger, Filtered Inputs for Noise Suppression
Bi-directional Data Transfer Protocol
100kHz and 400kHz Compatibility
Write Protect Pin for Hardware Data Protectio..
4N35 - Phototransistor Optocoupler
Description:
The 4N35 is an optocoupler for general purpose applications. It contains a light emitting diode optically coupled to a phototransistor. It is packaged in a 6-pin DIP package and available in widelead spacing opti..
74HC160 - BCD Decade Counter with Asynchronous Reset, DIP-16
74HC160, Presettable BCD Decade Counter with Asynchronous Reset, DIP-16
The 74HC/HCT160 are synchronous presettable decade counters which feature an internal look-ahead carry and can be used for high-speed counting.
Sy..
74HC164 - 8-bit serial-in, parallel-out shift register
The 74HC164; 74HCT164 is an 8-bit serial-in/parallel-out shift register. The device features two serial data inputs (DSA and DSB), eight parallel data outputs (Q0 to Q7). Data is entered serially through DSA or DSB and..
74HC27 / 74HCT27 - Triple 3-input NOR gate
The 74HC27; 74HCT27 is a triple 3-input NOR gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
Category
Integrated Circuits (ICs)
Name
74HC27 / 74H..
74HC32 / 74HCT32 - Quad 2-input OR Gate
Description
This device contains three independent gates each of which performs the logic OR function.
Category
Integrated Circuits (ICs)
Name
74HC32 / 74HCT32 - Quad 2-input OR Gate
Family
CMOS
Series
74xxx
Mou..
74HC573 - Octal D-type transparent latch
Description
The 74HC/HCT573 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT573 are octal D-type transparent latches featuring s..
74HC73 - Dual JK flip-flop with reset; negative-edge trigger
Description:
The 74HC73 is a high-speed Si-gate CMOS device and is pin compatible with low-power Schottky TTL (LSTTL). The 74HC73 is specified in compliance with JEDEC standard no. 7A.
The 74HC is a dual negative-edge ..
74HC74 / 74HCT74 - Dual D-type flip-flop with set and reset; positive-edge trigger
Description:
The 74HC/HCT74 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A.
The 74..
The 74HC86 exclusive OR gate utilizes advanced silicon-gate CMOS technology to achieve operating speeds similar to equivalent LS-TTL gates while maintaining the low power consumption and high noise immunity characteritic of standard CMOS integrated circuits. These gates are fully buffered and have a..